RAMIC Technology Pvt Ltd
Team
Ramkumar Balasubramanian, Ph.D in VLSI domain, has 16+ years of experience in DFT – Scan, ATPG, Memory BIST, Memory Repair, Test compression, IDDQ, IJTAG, Boundary Scan, FPGA and RTL design. He provided DFT support to top semiconductor company’s: Qualcomm, LG Soft India, Microchip, Cisco Systems, eSilicon, Marvell, AMD.
Ravi Siddan, has 18 + years of experience in physical design - Fullchip/blocks covering Floorplan, Placement, Clock tree plan & analysis, Scan reordering, Clock tree synthesis, Placement optimizations, Routing, Timing and SI analysis/closure, EM/IR, DRC, LVS, ERC analysis & fixes. He provided support for various semiconductor companies.
Dhanabal R, has 13 + years of experience in Design Verification - SOC/IP level functional verification using system Verilog/UVM. Development of testplan, testbench components, verification environment, interface agents, Scoreboard in UVM. Experience with standard protocols like Ethernet, PCIe, MIPI, USB and AMBA.